The semiconductor industry is facing a new era in which device scaling and cost reduction will no longer continue on the path followed for the past few decades. Packing more transistors on a monolithic IC is becoming more difficult and expensive at each node. Semiconductor companies are now looking for technology solutions to bridge the gap and improve cost-performance, while at the same time adding more functionality through integration. Integrating all the functions into a single chip, known as system on a chip (SoC), presents many challenges that include higher costs and design complexities. An attractive alternative is heterogeneous integration that uses advanced packaging technology to integrate devices which could be separately designed and manufactured by the most suitable process technology in the most optimized way.
What is Heterogeneous Integration (HI)?
Heterogeneous Integration refers to the integration of separately manufactured components into a higher level assembly (System-in-Package, SiP) that, in the aggregate, provides enhanced functionality and improved operating characteristics. Source: Heterogeneous Integration Roadmap 2019 Edition CHAPTER 1 OVERVIEW.
The combined components can vary in system level (e.g., pre-assembled package or subsystem), functionality (e.g., specialized processors, DRAM , flash memory, surface mount device (SMD), resistor/capacitor/inductor, filters, connectors, MEMS device, sensors) and technologies (e.g., one optimized for die size with another one optimized for low power). The overall idea behind heterogeneous integration is to integrate multiple dies in the same package. This enables the package to perform a specific and advanced function in a small form factor.