ASE Leadframe packages are common in consumer products, automotive devices, memory, analog ICs, and microcontrollers. These packages have evolved into a state-of-the-art technology owing to their robust reliability and great improvement on performance.
Based on copper lead frame, Quad Flat No-lead (QFN) or microchip carrier uses half-encapsulation technology to expose the rear side of the die pad and the tiny fingers, which are used to connect the chip and bonding wire with the PCB. QFN packages are suitable for applications over 12GHz working frequency. Providing both thermal and electrical enhancement, QFN is a cost-effective packaging solution due to its economical materials and simpler packaging process.
Advanced Quad Flat No-lead. aQFN™ is solution for Lead less, multi-row and fine pitch lead frame package with enhanced Thermal/ Electrical performance. aQFN™ is a cost-effective packaging solution due to its economical materials and simpler packaging process.
Quad Flat Package (QFP) is popular among the quad packages. The reason is the fine etching or stamping lead frames enables QFP to contain more leads and feature a smaller profile to perform better electrical characteristics by shortening the interconnection (the lead width can be as small as 0.16mm while the outer lead pitch is 0.4mm only). The thinner and flexible leads in gull-wing shape also provide better 2nd-level reliability (package-to-PCB reliability).
The package with drop-in HS can allow more than 50% power dissipation compared with a conventional package (e.g. in QFP 28x28mm, the allowable power of standard type and the type with HS is about 2.1W and 3.5W respectively). This drop-in HS drives off the heat from the chip more easily by extending the conduction area, and transferring more heat via the lead frame. QFP with drop-in HS is to package sizes of 14x20, 28x28, and 32x32mm.
Quad packages have been used for years to meet increasing challenges of faster processors/controllers, ASICs, DSPs, gate arrays, logic, memory ICs (EEPROM, Flash, DRAM & SRAM), PC chipset, video-DAC, multi-media and other related application.
HS-QFP is suitable for use in high thermal applications like power & voltage regulators, power amplifiers, etc.
Low profile and thin Quad Flat Packages (QFP) are classified by the overall thickness (t) according to JEDEC definition:
Low profile and thin QFPs are becoming popular, as they are ideal for the applications in lightweight and portable electronic products. ASE offers the lead count of LQFP/TQFP ranging from 32 to 256 and 44 to 176 respectively, covering almost all the applications in memory, DSP, and communication ICs. Due to the low electrical parasitic out of the small outline and shorter leads, low and thin QFPs are suitable for RFICs, and a cost-effective alternative to expensive ceramic QFPs.
Exposed Pad L(T)QFP
The exposed pad can be soldered to the PCB so that the heat can be driven off directly (the JA is only half as much as the standard L(T)QFP). Besides, this pad is also electrically grounded, and thus results in far smaller ground inductance. Exposed pad L(T)QFP is a cost-effective solution suitable for enhancing thermal and electrical performance.
Plastic Leaded Chip Carrier (PLCC) is widely used in micro-controllers and consumer electronics. Each lead of the PLCC is formed into a "J"-shape and folded under the package body. ASE provides PLCC packaging services in compliance with JEDEC standard. Lead count ranges from 20 to 84 with 1.27mm (50mil) lead pitch.
ASE's PLCC product was designed in compliance with JEDEC standard for 'J' shape leaded SMT packages. Its robust leads and smaller foot space makes it applicable for surface mount and replaceable plug-in assembly via sockets.
Design applications include,
Small Outline J-leaded (SOJ) package is similar to PDIP, but the leads' end are formed in a "J"-shape to be folded under the body. This aims to reduce the foot print. With the increasing popularity of SMT and with a smaller outline than PDIP, SOJ is widely used to complement PDIP.
The features of Small Outline Package (SOP) are similar to SOJ, except that the leads' end is formed in the shape of a gull-wing. Shrink small-outline package (SSOP) is the shrunk version of SOP, with lead pitch narrowed from 1.27mm (50mil) to 0.635mm (25mil). The shrunk body means flexible layout within finite PCB area. Another advantage is that shorter leads improve the electrical performance.
Plastic dual-in-line packaging (PDIP) is a principal package using the pin-through-hole (PTH) technology. It is widely used in low cost and manual applications. ASE offers PDIP with lead counts ranging from 8 to 64 leads and package width from 7.62mm (300mil) to 17.78mm (700mil). For package size reduction, ASE offers two alternatives - the narrow body type, Skinny PDIP (width is 300mil, lead count is 24, 28) and the narrow lead pitch type, Shrink PDIP or SDIP (lead pitch is 1.78mm or 70mil, lead count is 32, 56, 64).
Dual-in-line packages are considered one of the more established industry standard packages. PDIP’s broad ranges of applications include logic, memory ICs, microcontrollers, and logic, power ICs used in automotive devices, consumer and communications products.
