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BOC (DDR Substrate)

The BOC package was designed as a cost effective CSP solution specifically for high-frequency memory devices. The structure provides the shortest wire length and outstanding electrical performance for the central – pad device layout through the use of low-cost wire bonding and BGA technologies.


The BOC package is an ideal IC package for devices such as SDRAM, SGRAM, DDR SDRAM, RAMBUS DRAM and next-generation.

  • Cost competitive for high performance DRAM
  • JEDEC standard configuration – 60 balls
  • Package dimension 1.2mm max thickness
  • Dielectric- Rigid 2 layer substrate
  • Customer substrate design available


Item Condition/Duration
MST Level 3, 30°C/60% RH, 192 hrs
TCT -65ºC~150ºC, 1000 cycles/-55~125ºC,
HAST 130°C/85% RH, 33.5 psi 96 hrs
HTST 150°C, 500/1000 hrs

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