Embedded Die Technology

Advanced Embedded Active System Integration (aEASI)

Semiconductor Embedded in Substrate (SESUB)

ASE's Embedded (Chip) Technology is considered an alternative solution to achieve higher level integration with multi-functionalities and form factor shrinkage advantages. ASE a-EASI is suitable for power electronics applications to reduce power loss and high thermal dissipation which also had robust mechanism. Embedded Technology provides SMT integration and flexible routing solution to reduce PCB size. The short connection path though Cu via structure. a-EASI applied metal lead frame to die placement which has high thermal dissipation and EMI benefit.

Application

MOSFET
Regulator
DCDC
IGBT
Power modules

Features

Pinout: BGA/LGA/QFN
Package size: <50 (mm²)
Thermal: Excellent
IOs: Up to 100
Power: 1000+ (W)

P1 Structure

via direct on chip pad

Excellent electrical & thermal performance
HVM production proven

P2 Structure

Thermal enhance (exposed pad)
Thinner package
Support various footprint (BGA, LGA, QFN)
Single die pass AEC-Q100 G1 by customer
Embedded 8 chips max. (under customer qualification)

P3 Structure

via direct on chip pad

Improve design flexibility for vertical current device
Highly integration – smaller form factor

Reliability

Key embedded chip technology will be copper via on die pad, Cu pad on die provided good connection structure, both of bare Cu pad or polyimide layer cover Cu. Compare with traditional lead frame package solution, a-EASI is the solution for low loss and high thermal performance requirement. In high current output, the power efficiency still achieves more than 90%.

Package Level

Test Item	Test Condition	Duration
PRECONDITON	MSL3 (Soak: 30°C/60% RH)	N/A
HAST	130°C/85 % 33,3 PSIA	96 hrs, 192 hrs
TCT	-65°C~150°C	500/1000/1500/1700/2000 cycles
HTST	150°C	500/1000/1500/2000 cycles

Board Level

Test Item	Test Condition
Drop Test	-1500 G, 0.5 ms
Cyclic Bend Test	Deflection: 2mm Frequency: 1Hz
TCT	-40°C~125°C, 50min

SESUB (Semiconductor Embedded in SUBstrate) is a technology that embeds the IC in the laminated substrate. This substrate with the thinned IC embedded can be mounted with various electronic components to form a highly integrated, multiple function module/package. SESUB enables the micro-modularization of functional circuitry such as high-performance PMUs for smartphones as well as Bluetooth modules. SESUB has already been a proven technology by many customers and IC vendors.

Application

A broad application coverage including:

MCU
FEM
PMIC
Optical
Memory

Audio
Power
Sensor
Processor
Connectivity

Image module
Automotive ADAS
High Frequency Application

Features

Pinout: BGA/LGA
Package size: 200+ (mm²)
Thermal: Good
IOs: Up to 1000
Power: <20+ (W)

The figure below illustrates the cross-section view of a multi die embedded module utilizing SESUB technology. The SESUB is a 1-2-1 4-layer structure which provides properties for size reduction, thermal dissipation, mechanical robustness, performance improvement. SESUB not only serves as module, but also as package with thin thickness.

The properties include

Multi-die embedded in substrate
Very thin die thickness min. 50um
Thin substrate thickness max. 280um
High integration package
Small form factor
Space saving
Low profile
Low noise emission
Enhance heat dissipation
Robust copper connection
Mitigate unwanted noise radiation
SMT on surface of substrate
JEDEC MSL3 certified

Embedded Die Substrate

Embedded Die Substrate

What is Embedded Die Substrate?

Advantages of Embedded Die Packaging

Application

Features

P1 Structure

P2 Structure

P3 Structure

Reliability

Application

Features