Integrated Design Ecosystem™

Introducing ASE’s Integrated Design Ecosystem™

ASE’s Integrated Design Ecosystem™ (IDE) is a collaborative design toolset optimized to systematically boost advanced package architecture across its VIPack™ platform. This novel approach allows a seamless transition from single die SoC to multi-die disaggregated IP blocks including chiplets and memory for integration using 2.5D or advanced fanout structures.

Today’s frontline chiplet and heterogeneous integration developments are emerging to push technology boundaries and are elevating demand for innovative design flows and circuit-level simulations to accelerate complex design achievements. The IDE enables design efficiencies up to 50% and sets new standards for quality and user experience. Integrating innovative package design tool capabilities into ASE’s workflow has resulted in significant cycle time reduction while lowering customer costs. Enhanced features of IDE include cross platform interaction encompassing layout and verification, advanced RDL and silicon interposer auto routing with embedded design rule checking (DRC), and Package Design Kit (PDK) implementation in the design workflow.

The IDE PDK is available upon request and under NDA.



  • ASE has streamlined compatibility between multiple EDA vendors to simplify layout and verification process, resulting in a 50% cycle time reduction.
  • The IDE synergistically reduces the overall FOCoS-Chip Last package design cycle time from 90 days to 45 days.
  • IDE elevates ASE’s package design efficiency to deliver the performance, cost, and time-to-market benefits for customers to stay competitive.
  • ASE’s IDE is ideal for optimizing the design of VIPack™ structures geared towards AI, ML, HPC, 5G, autonomous transportation, and consumer electronics.
  • Advanced RDL interposer auto-routing discretely reduces the design cycle time by 50%.
  • The IDE workflow lays the foundation for multiphysics simulation adoption.
  • Layout and verification tool cross platform integration discretely reduces the verification cycle time by 50%.


ASE’s IDE underpins VIPack™, a scalable platform that is expanding in alignment with industry roadmaps.

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