Press Room

Taiwan, May 31, 2001 – Advanced Semiconductor Engineering Incorporated (ASE, TAIEX: 2311, NYSE: ASX), one of the world’s largest semiconductor packaging and testing companies, has introduced two new chip manufacturing technologies – Sandwich SCSP (Stacked-die Chip Scale Package) and SiP (System in a Package) – to meet the growing worldwide demand from the communications and hand-held products markets. In these markets, the trend has been towards Chip Scale Packaging (CSP) technology because of its flexibility, density, performance, low cost and small form factor.

Sandwich SCSP is a new generation of CSP that ASE began using for mass production during the first quarter of 2001 to produce 1.2mm high packages with a new, higher level of integration. Sandwich SCSP allows the stacking of identically-sized dice unlike current SCSP technology, in mass production since 1999, which only allows the stacking of different size dice. This new technology allows up to three dice to be stacked in an advanced TFBGA (Thin and Fine-pitch Ball Grid Array) package and reduces the package-to-chip ratio to less than 1.0. Combined with Double Density Packaging (DDP), ASE can now offer significantly more capacity and functionality in a smaller package – 1.2mm high against competitive products at 1.4mm high – and is now the packaging method of choice for applications such as mobile phone memory.

J.J. Lee, vice-president of Research & Development at ASE, said, “The launch of Sandwich SCSP demonstrates how ASE is continually working with and developing the most advanced IC stacking technology in the industry. The main application for Sandwich SCSP will be to meet the large memory demand from the mobile phone, PDA, digital still camera and other compact product markets. The future for mainstream memory packages lies in lighter, thinner, smaller and increased chip-density packages.”

ASE is using the new Sandwich SCSP and SiP technologies along with its Stacked Die and Multi Chip Module (MCM) technology to integrate logic, memory and analog chips with other components into a single package and thus reduce the PCB area required for chip mounting. In the manufacturing of sub-assemblies, this reduces the number of components on the PCB and accelerates assembly and testing. Using this packaging method also improves performance by reducing the distance between components and minimizing losses that traditionally occur between the silicon and the board.

Lee added, “The most important application foe SiP package technology lie in portable PCs, communications products and consumer electronics. The range of applications is broadening, and SiP provides the flexibility to use different IP(intellectual property) blocks along with active and passive components integrated together in the same package. SiP lowers costs, increases transmission speed and can satisfy the highest performance demands from a whole range of products. SiP technology will be crucial for every kind of portable electronics product.

ASE has consistently set the pace in packaging technology development. In 1999, it led the industry with 1.4mm thick SCSP technology. Through continual SCSP development, ASE has once again pulled ahead of the market with its 1.2mm thick Sandwich SCSP and SiP technology. With more options, more advanced technology and maximum flexibility; ASE will use its full packaging and testing range to compete for increased IDM (Integrated Device Manufacturer) high-end chip package orders.