Fan Out Chip on Substrate

Fan Out Chip on Substrate (FOCoS)

The fan-out wafer-level packaging market is heating up. With the packaging done on singulated die formed into a reconstituted molded wafer, Fan Out packaging enables multi-die packages, through partitioning with different nodes and functionality. Initially Fan Out was used primarily for smaller, lower I/O count packages, until ASE introduced a very high-density Fan Out alternative to 2.5D Interposer packages, Fan Out Chip on Substrate (FOCoS), a hybrid Fan Out/FCBGA package.

What is Fan Out Chip on Substrate (FOCoS)?

FOCoS is defined as a fan-out package flip-chip mounted on a high pin count ball grid array (BGA) substrate. The fan-out package is constructed from multiple chips with short interconnection between die to die (D2D) by a re-distribution layer (RDL) process, which has the potential for high speed communication and multi-function applications. The fan-out package is treated as if it was a single die and then flip-chip mounted onto the BGA substrate.

Fabrication process of Fan Out Chip on Substrate (FOCoS)

The fabrication process of the FOCoS package can be simply divided into three phases: wafer level reconstruction, re-distribution layer and package level flip-chip assembly. The schematic fabrication process sequence is shown below:

Fan Out Chip on Substrate (FOCoS) can replace 2.5D/Interposer for specific applications

2.5D interposer solution has gained traction in high-end applications, such as FPGAs, graphics chips and networking. But the cost of the interposer and other factors have prevented 2.5D from becoming a more mainstream technology. FOCoS eliminates the need for an interposer and performs electrically better than the 2.5D interposer solution. In addition, FOCoS has less insertion loss, better impedance control and lower warpage than 2.5D. FOCoS is a lower cost solution with better electrical performance.

Key advantages of applying Fan Out Chip on Substrate (FOCoS) over 2.5D: